News

Professor Ming C. Wu's group at the University of California, Berkeley, has chosen Zipcores' ZIP-FMC DSP Mezzanine card for their research into machine learning using photonics. Philip Jacobson, key PhD researcher at Berkeley explains:

"Given our reliance on analog electronics, we're using an FPGA with the Zipcores FMC card to control the data I/O within our system. This FMC card allows us to sample at high speed using a low-cost, low-power PicoZed platform. The FMC card has proven critical for the demonstration of complicated machine learning tasks like image recognition.

Ultimately, the goal of our work is to develop novel, high-speed, low-power machine learning platforms by leveraging photonics. Our work is based on the reservoir computing paradigm, in which an electro-optic modulator with delayed feedback is used to perform classification tasks".

You can learn more about UC Berkeley EECS department and their research projects just here.

Zipcores sends out heart-felt thanks to the medical professionals working tirelessly during this COVID-19 pandemic. They are the true heroes in this crisis. Here's hoping for better times and a return to 'normality' as soon as possible. To our customers, we would like to advise that Zipcores' employees will be working remotely from home during the next couple of months due to the severity of cases here in Spain. We've been hit hard by the coronavirus, but we'll do our best to maintain services to the best of our ability under the circumstances. All IP Core sales, FPGA, SoC and ASIC custom design will continue but with some restrictions on physical board testing and prototyping services. Many thanks for your understanding.

We are experts in providing Data Acquisition, Digital Signal Processing (DSP) and Software Defined Radio (SDR) solutions for FPGA and SoC platforms. Our areas of expertise include high-speed ADC and DAC interfaces (e.g. parallel/LVDS), digital modulation schemes (e.g. PSK/FSK) and baseband processing for SDR. We can provide standard COTS IP Cores or fully custom solutions to meet your design requirements.

Looking for a head-start in your next Zynq™ SoC project? If so, then why not let Zipcores lend a hand? Combining programmable logic with the embedded ARM® Cortex™ processor, the Zynq SoC is a cost-effective, low-power alternative to the traditional MCU + FPGA approach. Together with our extensive library of IP Cores, we are ideally placed to provide your next generation SoC design. What's more, we have a broad range of Zynq boards, add-on cards and PMOD™ modules at our disposal for the development and prototyping of almost any Zynq-based application.

After clocking over 500 hours of successful flight trials, we are delighted to offer two new ADS-B receiver solutions for general sale. Operating at carrier frequencies of 978 MHz and 1090 MHz, the IP Cores are compliant with RTCA specifications: DO-282B and DO-260B for Universal Access Transceiver (UAT) and Extended Squitter (ES) equipment. Provided as VHDL source code, the IP is fully generic and is suitable for both FPGA and ASIC implementations. In flight acceptance testing was carried out with the help of our partners at Flight Data Systems Inc. Please click on the following links for more information: ADS-B (UAT) and ADS-B (ES).

If you are looking to use design-assured electronic hardware in your next avionics or other safety-critical project, then look no further. Zipcores has teamed up with Logicircuit to provide DO-254 certifiable versions of all its IP Cores. Valid for a wide range of FPGA and ASIC devices, this certifiable IP provides an extra level of confidence for safety-critical systems. For more information, please contact either Zipcores or Logicircuit to discuss your requirements in full.

Our DSP cores have been tested with the next generation FPGA devices - including the latest 7-series FPGAs from Xilinx®. In addition, all our digital filter IP Cores are Matlab® - FDAtool compatible and offer a simple route from specification to implementation. Contact us and we'll help you get your DSP project off the ground!

Introducing our new Bayer to RGB converter core for image sensors. Our IP core uses a spatial filter with adaptive edge detection to interpolate the pixels from the CFA. The output is full resolution RGB at 24-bits per pixel. Other image processing IP cores available include: median filtering, gamma correction, colour and white balance adjustment. If you are looking for an image processing solution for FPGA or ASIC then please contact one of our Engineers to discuss your requirements in full.