SPI Master Serial Interface Controller

General Description

Master serial interface compatible with the popular SPI™ standard in both half-duplex and full-duplex modes. Features a simple command interface and permits multiple SPI slaves to be controlled directly from your FPGA, ASIC or SoC.

Key Design Features

- Fully SPI compliant
- Full-duplex or half-duplex operation
- Simple command interface
- Input and output FIFOs
- Supports up the 16 slave devices
- Configurable clock polarity (CPOL)
- Configurable clock phase (CPHA)
- Configurable clock frequency
- Typical FPGA comms up to 50 Mbits/s

Applications

- Inter-chip board-level communications
- Driving SPI slave devices from your FPGA, ASIC or SoC
- Serial comms at higher data rates than other protocols such as UART, I2C and USB1.x

View datasheet

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