Camera Link Interface

General Description

Camera Link® interface that supports the BASE, MEDIUM and FULL configurations. Implements both the Camera link receiver (frame-grabber) and Camera link transmitter (camera) interfaces. Directly compatible with the original National Semiconductor Corp. specifications.

Key Design Features

- Separate Camera Link® Tx/Rx pair
- Support for BASE, MEDIUM and FULL configurations
- Error checking for data misalignment at the receiver
- Data rates of up to 500 Mbits/s per lane on basic FPGAs and SoCs
- Uses the standard LVDS I/O resources available most FPGA and SoC devices
- Compatibility and/or replacement for a wide range of commercial SERDES LVDS ICs
- Examples include: SN65LVDS*, SN75LVDS*, DS90CR*, DS90UR* and THC63LVD* series ICs

Applications

- Real-time / low-latency video interfaces on low-cost devices
- Implementation of 'virtual' ribbon cable
- Data streaming interfaces over cable or twisted pair
- General purpose LVDS / SERDES applications

View datasheet

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