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Manchester Encoder/Decoder

Manchester Encoder/Decoder
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Manchester Encoder IP block diagram Manchester Decoder IP block diagram Arty-A7 board used as the Encoder Arty-S7 board used as the Decoder PMOD debug signals at the Decoder Decode of 2 x consecutive packets
SKU SKU108
$5000.00
Quantity
1 (this product is downloadable)

General Description

Manchester bit-encoder/decoder pair. Ideal for the transmission of serial data at up to 20 Mbps on low-cost FPGAs and SoCs. DC-balanced encoding scheme suitable for single-ended or differential transmission lines with AC-coupling. Features internal FIR pulse-shaping filters for optimum noise immunity.

Key Design Features

- Separate Encoder/Decoder pair
- DC-balanced encoding suitable for AC-coupling
- Ideal for twisted pair or coaxial transmission lines
- Internal gaussian pulse-shaping filters for optimum SNR
- Standard bitrate settings of 5, 10, 15 or 20 Mbps (low-cost FPGAs)
- Optional support for bit rates of 50+ Mbps on higher-end FPGAs
- Simple implementation
- Very low resource use
- Portable design

Applications

- Applications requiring low-to-medium serial bandwidth
- Industrial/Scientific/Medical/Automotive control systems
- Implementation of robust serial links on low cost devices
  e.g. RS-232, RS-422, RS-485, etc.

View datasheet

Manchester Encoder Manchester Decoder

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