Video Frame Buffer / Genlock

General Description

Video Frame buffer permits an asynchronous video source to be buffered in an external memory. Features a generic 128-bit memory interface suitable for all memory types including SDRAM, DDR2, DDR3 etc. Ideal for adapting to different pixel rates and frame rates. Scalable architecture allows multiple video inputs to be synchronized together. Can also work as a Genlock.

Key Design Features

- Asynchronous video input
- Output video synchronized to the system clock
- Simple user interface looks like a FIFO
- Supports any video resolution above 2x2 pixels*
- Supports 16, 24 or 32-bits per pixel
e.g. 4:2:2 YCbCr, 4:4:4 YCbCr, 24-bit RGB etc.
- Supports frame skip and frame repeat
- Programmable memory burst size
- System diagnostics to monitor performance
- Single 128-bit R/W port to external memory
- Optimized for all synchronous memory types
- Fully scalable for any number of video inputs
- FPGA clock rates of 300 MHz+

* External memory permitting

Video Frame Buffer Genlock 0

By cascading a number of Video Frame buffer modules in parallel, multiple asynchronous video sources may be buffered and synced locked together. Option also available to accept an external sync source for traditional 'Genlock' functionality.

Video Frame Buffer Genlock 1

Low-cost Xilinx® Spartan-6 reference design available on request

Spartan 6

Applications

- Buffering video frames in external memory
- Real-time digital video applications
- Synchronizing multiple video sources
- Video Genlock
- Adapting to different pixel rates and frame rates
- Essential component in video processing pipelines

View full product datasheet:

Details


SKU	SKU55
Price:	$3500.00

Options

Quantity

1 (this product is downloadable)

Video Frame Buffer / Genlock

Also available in this category