ZIPcores IP Cores for FPGA, CPLD and ASIC ZIPcores IP Cores for FPGA, CPLD and ASIC
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 Peripheral and Communications Interfaces
ZIPcores - Peripheral and Communications Interfaces - SPI Slave Serial Interface Controller

Printable version

SPI Slave Serial Interface Controller

SPI Slave Serial Interface Controller 

General Description

Slave serial interface compatible with the popular SPIŽ standard. Permits an SPI Master to communicate with your FPGA, CPLD or ASIC device. The controller uses a series of registers as a data structure to communicate between Master and Slave.

Key Design Features

- SPI Compliant
- Simple SPI programming
- Configurable number of config registers
- Configurable number of status registers
- Configurable clock polarity (CPOL)
- Configurable clock phase (CPHA)
- FPGA comms between 10-40Mbits/s

SPI Slave Serial Interface Controller

Applications

- SPI slave communication via your FPGA/ASIC
- Inter-chip board-level communications
- Serial comms at higher data rates than
  other protocols such as I2C and USB1.0

View full product datasheet: SPI Slave Serial Interface Controller

Details
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SKU SKU33
Price: $1500.00

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