High-speed symmetrical FIR Filter with an Even number of taps

General Description FIR filter designed for high sample rate applications with symmetrical coefficients and an even number of taps. The design is fully generic, with configurable coefficients, data width and number of taps. The architecture uses half the number of multipliers compared to a normal FIR implementation. Key Design Features - Systolic array for speed and scalability - 50% less multipliers than a direct-form FIR - Support for filters with inverted symmetry - Configurable coefficients - Configurable data width - Configurable EVEN number of taps - Symmetric arithmetic rounding - Output saturation or wrap modes - FPGA sample rates in excess of 350 MHz    Applications - High-speed filter applications - Filters where resources are limited - FIR filters with symmetrical coefficients - Filters that exhibit inverse symmetry such as:   High-pass, Differentiators and Hilbert transformers View full product datasheet: Details   SKU SKU16 Price: $1500.00 Options   Quantity 1 (this product is downloadable)