High-Speed LVDS (SERDES) Transceiver

General Description High-speed LVDS (SERDES) transceiver with up to 8 serial data lanes, generic data width and integrated asynchronous FIFO. Ideal for standard LVDS links such as Channel-link®, Camera-link®, FPD-link® or FlatLink® etc. Capable of data rates of up to 375MBits/s per lane on basic FPGA devices. Key Design Features - Separate Tx/Rx pair - Up to 8 serial data lanes - Parallel data width up to 128-bits wide - Parallel-to-serial mux ratio up to 16:1 - Data rates of up to 375Mbits/s per lane - Data rates of 3Gbits/s over 8 lanes - Integrated asynchronous FIFOs - Frequency mismatch error detection - Bitwise data alignment at Receiver - No Receiver source clock required - Robust and simple to implement   using cheap CAT5E Ethernet cable Applications - High bandwidth SERDES interfaces for   FPGAs with no specific SERDES H/W - Implementation of 'Virtual' ribbon cable - Transport of high-bandwidth digital video - Point-to-Point comms over a few meters - Connectivity with industry standards such as   Camera-link®, Channel-link®, FPD-link® View full product datasheet: Details   SKU SKU65 Price: $2500.00 Options   Quantity 1 (this product is downloadable)