ZIPcores IP Cores for FPGA, CPLD and ASIC ZIPcores IP Cores for FPGA, CPLD and ASIC
ZIPcores IP Cores for FPGA, CPLD and ASIC   ZIPcores IP Cores for FPGA, CPLD and ASIC
ZIPcores IP Cores for FPGA, CPLD and ASIC
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ZIPcores IP Cores for FPGA, CPLD and ASIC
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ZIPcores - Customer Case Study 3

Customer Case Study 3



"We're interested in developing a UART to I2C interface.
If we were to buy both cores, can you assist us with their integration?
Alternatively, can you do the integration for us?"

- Customer based in Manchester, UK


This initial request developed into a larger body of work for ZIPcores. A UK-based customer involved in environmental monitoring and sensing had a project brief to downsize an existing multi-chip design in order to cut production costs and overall unit size.


The project required a remote interface via serial link, an I2C interface (to an array of 10-bit DACs, ADCs and I/O expanders) and a small ALU block used to perform various processing functions on the data received from the external sensors.


Video format conversion


ZIPcores helped draft a short specification for the project and advised on possible solutions. Drawing from our existing library of IP, we performed the integration of our UART and I2C Master contollers together with some customized interface logic and a small arithmetic core.


After trial synthesis, a very basic solution combining the UART and I2C controllers was small enough to fit into a Xilinx Coolrunner-II CPLD. Alternatively we also offered a more complete solution with the onboard arithmetic unit using a Spartan3AN device. The Spartan 3AN was an integrated FLASH solution with enough spare resources for future expansion.


Conclusion

At ZIPcores we are happy to develop systems in unison with our customers and help them arrive at the best possible solution for their silicon-based projects. By integrating a number of systems into a single unit, our customer managed to reduce the chip-count of his original MCU-based design. In addition, with custom H/W acceleration the customer also managed to improve speed in which raw sensor data was processed.


 

 
FIFOs, Datapath and Pipeline Elements Peripheral and Communications Interfaces Caches and Memory Management Fixed-point Mathematics IEEE Floating-point Mathematics Digital Signal Processing Digital Modulation Digital Video Processing
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