ZIPcores IP Cores for FPGA, CPLD and ASIC ZIPcores IP Cores for FPGA, CPLD and ASIC
ZIPcores IP Cores for FPGA, CPLD and ASIC   ZIPcores IP Cores for FPGA, CPLD and ASIC
ZIPcores IP Cores for FPGA, CPLD and ASIC
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ZIPcores IP Cores for FPGA, CPLD and ASIC
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ZIPcores - Customer Case Study 2

Customer Case Study 2



"We need to see [with respect to the Digital Video Scaling Engine] VGA and SVGA to XGA
(to compare the upscaling). VGA, SVGA and XGA to QXGA(512x384)
(to compare the downscaling). Thanks!"

- Customer based in Melbourne, FLORIDA


In this particular instance, our customer had a requirement for multiple input video formats (VGA, WVGA, SVGA and XGA) to be converted to XGA(1024x768) and QXGA(512x384) output formats. Our customer sent us a number of source bitmaps which we used in a H/W simulation of our Digital Video Scaling Engine.


Video format conversion


Impressed with the results, our collaboration continued with the development of a customized 'wrapper' around the standard Video Scaler component. This allowed the input and output video formats to be selected by means of a simple 3-bit decode. We also modified the design so that scale parameters could be changed 'on-the-fly' on a frame-by-frame basis.


Digital Video Scaler wrapper


In addition, our customer was also interested in developing a windowed display application using a smaller Xilinx® Spartan3 device. To help them achieve their goal, we developed a low cost, high-quality Bi-linear scaler to save on H/W multipliers and FPGA Slices. Adopting the use of a 2x2-tap polyphase filter, the interpolation could be modified from true 'linear' interpolation to a sinc-like characteristic - resulting in a sharper image!


Conclusion

At ZIPcores, we are happy to provide test results for all our IP Cores. In this particular case, the customer provided a series of source bitmaps that we ran through our Digital Video Scaling Engine. This case study also demonstrates our willingness to modify our existing IP and develop new IP to suit the application. One of the advantages of working as a small team of Engineers is that we can be 100% customer driven, and flexible enough to adapt our designs - however big or small the change!


 

 
FIFOs, Datapath and Pipeline Elements Peripheral and Communications Interfaces Caches and Memory Management Fixed-point Mathematics IEEE Floating-point Mathematics Digital Signal Processing Digital Modulation Digital Video Processing
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