Custom Designs

This area is used specifically for custom designs
VHDL to Verilog translation service
VHDL to Verilog source-code translation service for a single IP Core
$500.00
IP Core upgrade package
Upgrade of previously purchased IP Core
$250.00
Custom source-code
Custom design for FPGA or ASIC - Please contact Zipcores with your requirements
$500.00
Custom modification
Custom modification - Please contact Zipcores with your requirements
$500.00
Custom demo
Demo source-code - Please contact Zipcores with your requirements
$500.00
Custom test product
Custom test product - not for sale
$1.00