ZIPcores IP Cores for FPGA, CPLD and ASIC ZIPcores IP Cores for FPGA, CPLD and ASIC
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 Digital Video Processing
ZIPcores - Digital Video Processing - Bilinear Video Scaling Engine

Printable version

Bilinear Video Scaling Engine

Bilinear Video Scaling Engine 

General Description

Bilinear video scaler with same functionality as the full Digital Video Scaling Engine. Exception is that bilinear interpolation is used in the x and y dimensions in order to save area and reduce the number of hardware multipliers. Ideal for smaller FPGA devices and lower cost applications.

Key Design Features

- 24-bit RGB video in/out
- Independent vertical and horizontal scaling
- Resolutions from 16x16 to 4095x4095 pixels
- 24-bit fixed-point scale factor
- 2x2-tap polyphase FIR filter (16 phases)
- Configurable coefficients for each phase
- Very small area footprint
- Scale-up to Full HD with frame rates of 100Hz+
- Separate config. of vertical and horizontal filters
- No frame buffer required

VGA to HD1080p Conversion
Applications

- Digital TV (HDTV)
- High quality RGB video scaling
- Video conferencing and surveillance
- Dynamic scaling of video in a window
- Broadcast video equipment
- Picture in picture applications
- Format conversion e.g. VGA -> HD1080p
- Home media solutions

View full product datasheet: Bilinear Video Scaling Engine

Details
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SKU SKU34
Price: $3500.00

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FIFOs, Datapath and Pipeline Elements Peripheral and Communications Interfaces Caches and Memory Management Fixed-point Mathematics IEEE Floating-point Mathematics Digital Signal Processing Digital Modulation Digital Video Processing
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