Asynchronous FIFO

Asynchronous FIFO
SKU SKU41
$500.00
Quantity
1 (this product is downloadable)

General Description

Asynchronous FIFO optimized for very high-speed operation. Features a configurable data width and depth. The component uses Gray-coded read/write pointers for highest reliability when synchronizing between different clock domains. Ideal for asynchronous interfaces where speed it critical.

Key Design Features

- Dual-clock architecture
- Configurable data width
- Configurable depth of 8 or 16 entries
- Gray-coded read/write pointers
- FIFO Full and Empty flags
- Simple valid-ready pipeline interface protocol
- Compatible with AMBA® AXI4-stream, Altera® Avalon-ST and Xilinx® local-link
- 400 MHz+ operation on basic FPGA devices

Applications

- Synchronizing between clock domains
- Registering the datapath on and off chip
- General purpose buffering
- Adapting to different data rates

View datasheet

Asynchronous FIFO

: *
: *
: *
 
 
Floating-point Multiplier
Floating-point Multiplier
desc here
$2500.00
Arctan Function
Arctan Function
desc here
$1500.00
RF-DSP Development Board
RF-DSP Development Board
desc here
$2500.00
VHDL to Verilog translation service
VHDL to Verilog translation service
desc here
$0.00
ADS-B 978 MHz (UAT) Receiver
ADS-B 978 MHz (UAT) Receiver
desc here
$0.00
Motion-adaptive Video Deinterlacer
Motion-adaptive Video Deinterlacer
desc here
$8500.00
Parallel FLASH Memory Controller
Parallel FLASH Memory Controller
desc here
$1500.00
Cosine Function
Cosine Function
desc here
$1500.00
Fixed-point to Floating-point Converter
Fixed-point to Floating-point Converter
desc here
$1500.00