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ZIPcores IP Cores for FPGA, CPLD and ASIC
ZIPcores IP Cores for FPGA, CPLD and ASIC   ZIPcores IP Cores for FPGA, CPLD and ASIC
ZIPcores IP Cores for FPGA, CPLD and ASIC
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 Fixed-point Mathematics
ZIPcores - Fixed-point Mathematics - 18-bit Sincos Function

Printable version

18-bit Sincos Function

18-bit Sincos Function 

General Description

Function calculates the Sine and Cosine of input x in radians. Inputs are 18-bit signed values in the range -Pi to Pi. Output values are 17-bit signed in the range -1 to 1. Ideal for the generation of quadrature signals in DSP and digital comms applications.

Key Design Features

- Combined function y = sin(x), y = cos(x)
- Input range between -Pi and Pi radians
- Output range between -1 and 1
- Input values as 18-bit signed
- Output values as 17-bit signed
- Accurate to within 0.00017
- Small implementation size
- High-speed fully pipelined architecture
- 5 clock-cycle latency

Sincos x function

Applications

- Fixed-point mathematics
- Quadrature signal generation in digital comms
- Cheaper than a CORDIC solution of similar spec.

View full product datasheet: 18-bit Sincos function

Details
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SKU SKU38
Price: $1000.00

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